Multiple Clock Domain (MCD) processor for energy saving
The clock frequency of a chip is related to its energy consumption. The higher frequency is, the more energy will be consumed. In a single-clock chip system, a unique clock is used everywhere for the whole chip, which however may not be energy-efficient because some domain in the chip may actually not require that high frequency.
To be more energy-efficient, a Multiple Clock Domain (MCD) processor, in which the chip is divided into several (coarse-grained) clock domains, within which independent voltage and frequency scaling can be performed. Based on such architecture, no a unified clock is required for the whole chip, and as a result, energy can be saved for those chip domains that do not need a high frequency. According to some preliminary results reported by a research group from University of Rochester, it is possible to obtain an average energy-delay product improvement of 20% with MCD. Interesting readers may read the following reference:
Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling
